1. Field of the Invention
The present invention generally relates to a method, system and synchronization circuit for providing hardware component access to a set of data value without restriction. Specifically, the present invention provides hardware-based synchronization within a set top box so that data values can be communicated between a set of clock registers operating at a first frequency and a set of DCR registers operating at a second frequency.
2. Background Art
Set top boxes are becoming increasingly popular in many households. Specifically, set top boxes are commonly used to receive cable and/or satellite television signals. As their popularity continues to grow, the functionality provided by the set top boxes improves. For example, many of today's set top boxes not only display date and time information, but also provide users with viewing schedules, pay per view options, etc. at the press of a button. In many cases, a set top box is designed to include circuitry that operates at more than one frequency. For example, a set top box can include real time clock circuitry and a set of clock registers that operates at one frequency, and a device control registry (DCR) interface that operates at another frequency. This can be problematic when access to data values stored in the set of clock registers is desired by a hardware component (e.g., a CPU). Specifically, the real time clock is generally updated once per second. During the update time, the clock registers are not accessible to hardware components. Thus, some type of restriction is required that provides hardware components with the opportunity to read in the data values from the set of clock registers. In general, these restrictions require software-based synchronization within the set top box. For example, one common form of restriction is an “interrupt” that prevents the clock registers from being written to so that a hardware component can read the data values stored therein. Unfortunately, restrictions such as interrupts waste valuable CPU time. As indicated above, set top boxes are capable of performing many functions. To waste CPU time waiting for an interrupt would only detract from the effectiveness of the other functions. Another type of restriction requires the clock logic to sample a “status bit” to determine when the clock registers can be written to. Such sampling decreases the efficiency of the set top box.
In view of the foregoing, there exists a need for a method, system and synchronization circuit for providing hardware component access to a set of data values without restriction. To this extent, a need exists for hardware-based synchronization within a device such as a set top box so that data values can be communicated between a set of clock registers operating at one frequency and a set of DCR registers operating at another frequency. Still yet, a need exists for a hardware component such as a CPU to be able to access data values in the set of clock registers by accessing the set of DCR registers.